1. Field of the Invention
The present invention generally relates to a semiconductor device and a method of controlling the semiconductor device, and more particularly, to a semiconductor device having non-volatile memory cells and a method of controlling the semiconductor device.
2. Description of the Related Art
In recent years, non-volatile memories that are semiconductor devices in which data can be rewritten have been widely used for various electronic devices such as portable telephone devices and digital cameras. A flash memory that is a typical non-volatile memory accumulates charges in the charge accumulation layers of the memory cells so as to write data into the memory cells in a non-volatile manner. The data can be erased by eliminating charges from the charge accumulation layers. Some non-volatile memories have protection functions for prohibiting writing and erasing data in the memory cells and reading of the data from the memory cells for security purposes.
In this specification, data writing (data being “0”, and the threshold voltage of a subject memory cell being increased) or data erasing (data being “1”, and the threshold voltage of a subject memory cell being lowered) is referred to as “programming”. Also, programming of data in a subject memory cell (data “1” being changed to “0”, or data “0” being changed to “1”), writing of data into a subject memory cell (data “1” being changed to “0”), erasing of data in a subject memory cell (data “0” being changed to “1”), and reading (data “0” or “1” being output) are called memory cell programming, memory cell writing, memory cell erasing, and memory cell reading, respectively. Further, programming, writing, erasing, and reading of data in and from the memory cells in a subject memory region including two or more memory cells are called memory region programming, memory region writing, memory region erasing, and memory region reading, respectively.
A method of prohibiting programming (data writing or erasing) in a memory cell may be realized by a function of disabling or enabling programming in each of the memory regions. Such a function is called a write-protect function. To achieve this function, a disabling information memory unit that stores program disabling information indicating whether programming is to be disabled or enabled in a subject memory region is provided for each of the memory regions in a non-volatile memory.
Japanese Unexamined Patent Publication No. 5-266681 (Patent Document 1) discloses a non-volatile memory that includes a write restricting register (equivalent to the disabling information memory units) and the memory cell array and a logic circuit for restricting writing into the write restricting register.
Utilizing the technique disclosed in Patent Document 1, a non-volatile memory has been developed. After the memory region is switched to the program disabled state, this non-volatile memory has the function of prohibiting a change of a memory region from a program disabled state to a program enabled state (in this manner, the memory region ROM-ize after once it is put into the program disabled state). This function is called the STB (Set Top Box) function. Such a non-volatile memory can determine whether the STB function should be made valid or invalid. To realize this function, ROM information is set for indicating whether to prohibit a change of the program disabling information from a program disabling state to a program enabling state after the program disabling information is switched to the program disabling state (whether the subject memory region should be turned into a ROM). The ROM information is stored in a ROM information memory unit of a non-volatile type. For example, when the non-volatile memory is shipped, the ROM information is set in response to a request of its user. Or only a user having authority can set ROM-ize information. By doing so, falsification (rewriting) of the data stored in the ROM memory regions by a hacker or the like can be prevented.
Japanese Unexamined Patent Publication No. 11-213680 (Patent Document 2) discloses a non-volatile memory that sets two or more pieces of write protect information (equivalent to the program disabling information) at the same time. Therefore, a latch circuit is provided for each of the write protect memory circuits (equivalent to the disabling information memory units), and the program disabling information in the write protect memory circuits is set through the latch circuits at the same time.
By the technique disclosed in Japanese Unexamined Patent Publication No. 2002-342164 (Patent Document 3), management information for performing individual control for each memory region is set, and access is prohibited by setting control information. The non-volatile memory disclosed in Patent Document 3 has a memory unit that collectively stores the control information as the management information.
Japanese Unexamined Patent Publication No. 2000-268584 (Patent Document 4) discloses a non-volatile memory that includes an erasing disabling circuit that disables erasing in each memory region, and has a function of canceling a erasing disabled state.
With the non-volatile memory disclosed in Patent Document 2, a higher security level can be achieved, as more than one piece of program disabling information can be set at once. In doing so, however, more than one latch circuit is needed. As a result, the circuit area becomes larger. Moreover, as the information is input to several latch circuits, dispersion of the programming time varies among the latch circuits, resulting in an increase of the programming time. The non-volatile memory disclosed in Patent Document 3 has a memory unit that collectively stores the control information for prohibiting accesses. However, Patent Document 3 does not disclose a specific method of disabling programming collectively in several memory regions where the disabling information memory units are provided for the respective memory regions. Therefore, an object of the present invention is to provide a semiconductor device that can disable programming in several memory regions at once and still has a smaller circuit area, and to provide a method of controlling such a semiconductor device.
There has also been a non-volatile memory that does not allow a change of the program disabling information to a program disabling state if a high potential is not applied to an auxiliary input terminal when the program disabling information is to be switched from a program enabling state to a program disabling state. In such a non-volatile memory, however, the program disabling information cannot be switched from a program enabling state to a program disabling state via a communication line, for example. Depending on the purposes, the application of a high potential to the auxiliary input terminal is sometimes not preferable as the condition for switching the program disabling information to a program disabling state. Therefore, another object of the present invention is to provide a semiconductor device that can determine whether to use the application of a high potential to the auxiliary input terminal as the condition for switching the program information from a program enabling state to a program disabling state, and to provide a method of controlling such a semiconductor device.
There is also a demand for a non-volatile memory that has the STB function and the erasing disabling canceling function as disclosed in the Patent Document 4. In such a non-volatile memory, the STB function coexists with the function of canceling a program disabled state in a group of memory regions and performing erasing collectively (a batch erasing) in the memory regions in the group. In a case where the program disabling information is to be protected through the STB function, it is necessary to prevent erasing by the collective erasing function in each program-disabled memory region. Therefore, yet another object of the present invention is to provide a semiconductor device that can have the STB function and the collective erasing function cooperating with each other, and to provide a method of controlling such a semiconductor device.